Invention Grant
- Patent Title: Tamper-respondent assembly with interconnect characteristic(s) obscuring circuit layout
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Application No.: US16596941Application Date: 2019-10-09
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Publication No.: US11147158B2Publication Date: 2021-10-12
- Inventor: James A. Busby , John R. Dangler , Michael J. Fisher , David C. Long
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Agent Tihon Poltavets, Esq.; Kevin P. Radigan, Esq.
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/11 ; H05K1/18 ; H05K5/02 ; G01N27/04 ; G06F21/87 ; G06F21/86 ; H01L23/00 ; H05K1/09

Abstract:
Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor and a detector. The at least one tamper-respondent sensor includes conductive lines which form, at least in part, at least one tamper-detect network of the tamper-respondent sensor(s). In addition, the tamper-respondent sensor(s) includes at least one interconnect element associated with one or more conductive lines of the conductive lines forming, at least in part, the tamper-detect network(s). The interconnect element(s) includes at least one interconnect characteristic selected to facilitate obscuring a circuit lay of the at least one tamper-detect network. The at least one interconnect element is undetectable by x-ray, and the conductive lines are detectable by x-ray. In operation, the detector monitors the tamper-detect network(s) of the tamper-respondent sensor(s) for a tamper event.
Public/Granted literature
- US20200045812A1 TAMPER-RESPONDENT ASSEMBLY WITH INTERCONNECT CHARACTERISTIC(S) OBSCURING CIRCUIT LAYOUT Public/Granted day:2020-02-06
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