Invention Grant
- Patent Title: Multi-planar circuit board having reduced z-height
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Application No.: US16003970Application Date: 2018-06-08
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Publication No.: US11172581B2Publication Date: 2021-11-09
- Inventor: Eng Huat Goh , Min Suet Lim , Tin Poay Chuah , Han Kung Chua
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Priority: MYPI2017702402 20170629
- Main IPC: H05K3/00
- IPC: H05K3/00 ; H05K3/46 ; H05K1/02 ; H05K1/18 ; H05K3/30

Abstract:
Disclosed herein is a multi-planar circuit board, as well as related structures and methods. In an embodiment, a circuit board may include a first surface, a first section having the first surface in a first plane, a second section having the first surface in a second plane, and a third section connecting the first and second sections, where the third section defines a gradient between the first and second planes, and where all sections are sections within a contiguous board. In another embodiment, circuit board may further include a first component having a first thickness coupled on the first face of the first section, and a second component having a second thickness, greater than the first component, coupled on the first face of the second section, where the second section is in a lower plane, and where the overall thickness is the circuit board thickness plus the second thickness.
Public/Granted literature
- US20190008052A1 MULTI-PLANAR CIRCUIT BOARD HAVING REDUCED Z-HEIGHT Public/Granted day:2019-01-03
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