DYNAMICALLY CONTROLLING ELECTRONIC DEVICE OPEN AIR PATIO (OAR) USING ADJUSTABLE THERMAL VENTING MECHANISMS

    公开(公告)号:US20240244772A1

    公开(公告)日:2024-07-18

    申请号:US18619554

    申请日:2024-03-28

    申请人: Intel Corporation

    IPC分类号: H05K5/02

    CPC分类号: H05K5/0213

    摘要: Techniques are described to dynamically adjust the open air ratio (OAR) while ensuring compliance with regulatory requirements. An adjustable thermal vent assembly is described that dynamically adjusts the OAR for inlet/outlet vents depending on the current use case. The adjustable thermal vent assembly functions to increase the grating spacing only when a triggering condition is met that ensures that a corresponding thermal vent location is inaccessible. Such temporarily inaccessible regions may include the bottom cover of an electronic device when positioned on the surface of an object, for thermal intake vents, or the rear portion of an electronic device when the display cover exceeds a predetermined angle, for thermal exhaust vents.

    Wrappable EMI shields
    5.
    发明授权

    公开(公告)号:US11699664B2

    公开(公告)日:2023-07-11

    申请号:US17089756

    申请日:2020-11-05

    申请人: Intel Corporation

    IPC分类号: H01L23/552 H05K3/28 H05K1/02

    摘要: According to the various aspects, the present device includes a printed circuit board having a top surface and a bottom surface, with a plurality of semiconductor devices coupled to the top surface and a flexible electromagnetic shield wrap conformally positioned over and between the plurality of semiconductor devices and the top surface of the printed circuit board. The flexible electromagnetic shield wrap is conformally positioned by applying a vacuum and is removable after the vacuum seal is broken.

    Stacked scalable voltage regulator module for platform area miniaturization

    公开(公告)号:US11343906B2

    公开(公告)日:2022-05-24

    申请号:US16988759

    申请日:2020-08-10

    申请人: Intel Corporation

    IPC分类号: H05K1/02 H05K1/14

    摘要: The present disclosure generally relates to a scalable computer circuit board having a first power level semiconductor package coupled to at least one base-level voltage regulator module, which is coupled to a plurality of connection receptacles that are configured for connecting with a voltage regulator module positioned on a second level, as a standardized base unit. To scale the base unit, a second power level semiconductor package may be exchanged for the first power level semiconductor package in conjunction with one or more voltage regulator module board being positioned over a corresponding number of base-level voltage regulator modules and coupled to their plurality of connection receptacles.

    ELECTROMAGNETIC INTERFERENCE SHIELDING ENCLOSURE WITH THERMAL CONDUCTIVITY

    公开(公告)号:US20210153340A1

    公开(公告)日:2021-05-20

    申请号:US17127407

    申请日:2020-12-18

    申请人: Intel Corporation

    IPC分类号: H05K1/02 H05K9/00

    摘要: Embodiments described herein may be related to apparatuses, processes, and techniques related to EMI shielding and thermal conduction without using any surface area of a PCB. Embodiments of the EMI shield may include a planar top, with one or more walls extending from the planar top to a bottom surface of the PCB, the PCB having a top surface disposed between the bottom surface of the PCB and the planar top. A ground of the PCB may electrically couple with the one or more walls. The bottom of the walls may couple with an EMI gasket applied to a bottom chassis to increase the volume of EMI shielding. Other embodiments may be described and/or claimed.