- Patent Title: Semiconductor package including shielding plate in redistribution structure, semiconductor package including conductive via in redistribution structure, and manufacturing method thereof
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Application No.: US16893440Application Date: 2020-06-05
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Publication No.: US11195802B2Publication Date: 2021-12-07
- Inventor: Wei-Cheng Wu , Chien-Chia Chiu , Cheng-Hsien Hsieh , Li-Han Hsu , Meng-Tsan Lee , Tsung-Shu Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/76 ; H01L23/538 ; H01L23/00 ; H01L23/488 ; H01L21/768 ; H01L23/31 ; H01L21/56

Abstract:
A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.
Public/Granted literature
- US20210098391A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-04-01
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