Invention Grant
- Patent Title: Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device
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Application No.: US17104114Application Date: 2020-11-25
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Publication No.: US11211102B2Publication Date: 2021-12-28
- Inventor: Dae-Sik Moon , Kyung-Soo Ha , Young-Soo Sohn , Ki-Seok Oh , Chang-Kyo Lee , Jin-Hoon Jang , Yeon-Kyu Choi , Seok-Hun Hyun
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2018-0035367 20180327,KR10-2018-0132555 20181031
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C7/22

Abstract:
A method of operating memory devices disposed in different ranks of a multi-rank memory device and sharing a signal line includes receiving, in all of the memory devices included in the multi-rank memory device, on-die termination (ODT) state information of the signal line. The method further includes storing, in each of the memory devices of the multi-rank memory device, the ODT state information of the signal line in a mode register. The method further includes generating, in each of the memory devices of the multi-rank memory device, a control signal based on the ODT state information of the signal line stored in the mode register. The method further includes changing, in each of the memory devices of the multi-rank memory device, an ODT setting of the signal line in response to the control signal.
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