Invention Grant
- Patent Title: Package and manufacturing method thereof
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Application No.: US16745355Application Date: 2020-01-17
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Publication No.: US11227812B2Publication Date: 2022-01-18
- Inventor: Ming-Fa Chen , Sung-Feng Yeh , Jian-Wei Hong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/31 ; H01L23/544 ; H01L25/00 ; H01L21/768 ; H01L21/463 ; H01L25/065 ; H01L21/56

Abstract:
A package includes a semiconductor carrier, a first die, a second die, a first encapsulant, a second encapsulant, a first through insulating via (TIV), and a second TIV. The semiconductor carrier has a contact via embedded therein. The contact via is electrically grounded. The first die is disposed over the semiconductor carrier. The second die is stacked on the first die. The first encapsulant laterally encapsulates the first die. The second encapsulant laterally encapsulates the second die. The first TIV is aside the first die. The first TIV penetrates through the first encapsulant and is electrically connected to the contact via. The second TIV is aside the second die. The second TIV penetrates through the second encapsulant and is electrically connected to the contact via and the first TIV.
Public/Granted literature
- US20210066168A1 PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-03-04
Information query
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