Invention Grant
- Patent Title: Integrated fan-out package and manufacturing method thereof
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Application No.: US16991010Application Date: 2020-08-11
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Publication No.: US11239096B2Publication Date: 2022-02-01
- Inventor: Kai-Chiang Wu , Chung-Hao Tsai , Chun-Lin Lu , Yen-Ping Wang , Che-Wei Hsu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L21/768 ; H01L23/29 ; H01L23/31 ; H01L23/00 ; H01L21/78 ; H01L23/498

Abstract:
An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and at least one first through interlayer via. The first redistribution structure includes a dielectric layer, a feed line at least partially disposed on the dielectric layer and a signal enhancement layer covering the feed line, wherein the signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The at least one first TIV is embedded in the insulation encapsulation and the signal enhancement layer.
Public/Granted literature
- US20200373173A1 INTEGRATED FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-11-26
Information query
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