- Patent Title: Structure and formation method of chip package with fan-out feature
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Application No.: US16446796Application Date: 2019-06-20
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Publication No.: US11239173B2Publication Date: 2022-02-01
- Inventor: Po-Hao Tsai , Meng-Liang Lin , Po-Yao Chuang , Techi Wong , Shin-Puu Jeng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L21/98
- IPC: H01L21/98 ; H01L23/538 ; H01L21/48 ; H01L23/31 ; H01L25/00 ; H01L25/18 ; H01L21/56

Abstract:
A package structure and a formation method of a package structure are provided. The method includes forming a redistribution structure over a carrier substrate and disposing a semiconductor die over the redistribution structure. The method also includes stacking an interposer substrate over the redistribution structure. The interposer substrate extends across edges of the semiconductor die. The method further includes disposing one or more device elements over the interposer substrate. In addition, the method includes forming a protective layer to surround the semiconductor die.
Public/Granted literature
- US20200312773A1 STRUCTURE AND FORMATION METHOD OF CHIP PACKAGE WITH FAN-OUT FEATURE Public/Granted day:2020-10-01
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