Invention Grant
- Patent Title: On stack overlay improvement for 3D NAND
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Application No.: US16515230Application Date: 2019-07-18
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Publication No.: US11276569B2Publication Date: 2022-03-15
- Inventor: Yongjing Lin , Tza-Jing Gung , Masaki Ogata , Yusheng Zhou , Xinhai Han , Deenesh Padhi , Juan Carlos Rocha , Amit Kumar Bansal , Mukund Srinivasan
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO2. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of Si3N4. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.
Public/Granted literature
- US20200043723A1 ON STACK OVERLAY IMPROVEMENT FOR 3D NAND Public/Granted day:2020-02-06
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