Invention Grant
- Patent Title: Fully aligned interconnects with selective area deposition
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Application No.: US16826566Application Date: 2020-03-23
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Publication No.: US11289375B2Publication Date: 2022-03-29
- Inventor: Chanro Park , Kenneth Chun Kuen Cheng , Koichi Motoyama , Chih-Chao Yang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent L. Jeffrey Kelly
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L21/02 ; H01L21/311 ; H01L23/532

Abstract:
Interconnect structures and methods for forming the interconnect structures generally include forming a dielectric layer over a substrate. The dielectric layer includes a dielectric layer top surface. A metal line is formed in the dielectric layer. The metal line includes a sacrificial upper region and a lower region. The sacrificial upper region is formed separately from the lower region and the lower region includes a lower region top surface positioned below the dielectric layer top surface. The sacrificial upper region is removed, thereby exposing the lower region top surface and forming a trench defined by the lower region top surface and sidewalls of the dielectric layer. An interconnect structure is deposited such that at least a portion of the interconnect structure fills the trench, thereby defining a fully aligned top via.
Public/Granted literature
- US20210296172A1 FULLY ALIGNED INTERCONNECTS WITH SELECTIVE AREA DEPOSITION Public/Granted day:2021-09-23
Information query
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