Invention Grant
- Patent Title: Memory device, semiconductor device, and electronic device
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Application No.: US17053467Application Date: 2019-05-07
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Publication No.: US11309431B2Publication Date: 2022-04-19
- Inventor: Takahiko Ishizu , Kazuma Furutani
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JPJP2018-095468 20180517,JPJP2018-108278 20180606
- International Application: PCT/IB2019/053709 WO 20190507
- International Announcement: WO2019/220259 WO 20191121
- Main IPC: H01L29/78
- IPC: H01L29/78 ; G11C11/40 ; H01L29/786 ; G11C5/06 ; G11C11/405 ; G11C11/4093 ; G11C11/4096 ; H01L27/108

Abstract:
A memory device which includes a gain-cell memory cell formed using an n-channel transistor and in which a potential lower than a potential applied to a bit line is not necessary is provided. Memory cells included in the memory device are arranged in a matrix, and each of the memory cells is connected to a write word line, a write bit line, a read word line, and a read bit line. The write word line is arranged in parallel to one of directions of a row and a column of memory cells arranged in a matrix, and the write bit line is arranged in parallel to the other of the directions of the row and the column. The read word line is arranged in parallel to the one of the directions of the row and the column of the memory cells arranged in a matrix, and the read bit line is arranged in parallel to the other of the directions of the row and the column.
Public/Granted literature
- US20210265504A1 MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE Public/Granted day:2021-08-26
Information query
IPC分类: