- 专利标题: Technique for adjusting read timing parameters for read error handling
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申请号: US17213997申请日: 2021-03-26
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公开(公告)号: US11367491B1公开(公告)日: 2022-06-21
- 发明人: Liang Li , Xuan Tian , Vincent Yin , Jiahui Yuan
- 申请人: Western Digital Technologies, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Western Digital Technologies, Inc.
- 当前专利权人: Western Digital Technologies, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Vierra Magen Marcus LLP
- 主分类号: G11C7/00
- IPC分类号: G11C7/00 ; G11C16/32 ; G11C16/26 ; G11C16/04
摘要:
Apparatuses and techniques are described for recovering from errors in a read operation. When a read operation results in an uncorrectable read error, recovery read operations are performed for each read voltage of a page of data. Each recovery read operation uses a different timing. The different timings can involve a time period which is allocated for a voltage transition, such as a settling time of a word line or bit line voltage, or a time allocated for an under kick or over kick of a word line or bit line voltage. An error count is obtained for each different timing, and an optimum timing is determined based on the lowest error count. A retry read operation is performed in which an optimum timing is used for the voltage transition for each read voltage of the page.
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