Invention Grant
- Patent Title: Wire bonding between isolation capacitors for multichip modules
-
Application No.: US16526765Application Date: 2019-07-30
-
Publication No.: US11495553B2Publication Date: 2022-11-08
- Inventor: Thomas Dyer Bonifield , Jeffrey Alan West , Byron Lovell Williams
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ralston; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/64
- IPC: H01L23/64 ; H01L27/07 ; H01L23/00 ; H01L49/02 ; B81B7/00 ; H01L25/065 ; H01L25/00 ; H01L23/495

Abstract:
A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.
Public/Granted literature
- US20200027848A1 WIRE BONDING BETWEEN ISOLATION CAPACITORS FOR MULTICHIP MODULES Public/Granted day:2020-01-23
Information query
IPC分类: