- 专利标题: Dual processor system for reduced power application processing
-
申请号: US17006813申请日: 2020-08-29
-
公开(公告)号: US11537190B2公开(公告)日: 2022-12-27
- 发明人: Partha Sarathy Murali , Subba Reddy Kallam , Venkat Mattela
- 申请人: Silicon Laboratories Inc.
- 申请人地址: US TX Austin
- 专利权人: Silicon Laboratories Inc.
- 当前专利权人: Silicon Laboratories Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: File-EE-Patents.com
- 代理商 Jay A. Chesavage
- 主分类号: G06F1/32
- IPC分类号: G06F1/32 ; G06F1/3228 ; G06F1/3234 ; G06F9/54 ; H04W4/12 ; H04W4/80 ; G06F9/445 ; H04B1/00 ; H04B1/04 ; H04L51/58 ; H04L101/622 ; G06F1/3203
摘要:
A task processor has a low power connectivity processor and a high performance applications processor. Software processes have a component operative on a connectivity processor and a component operative on an applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.
公开/授权文献
信息查询