Invention Grant
- Patent Title: Isolated semiconductor layer stacks for a semiconductor device
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Application No.: US17114826Application Date: 2020-12-08
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Publication No.: US11545401B2Publication Date: 2023-01-03
- Inventor: Boon Teik Chan , Eugenio Dentoni Litta , Liping Zhang
- Applicant: IMEC vzw
- Applicant Address: BE Leuven
- Assignee: IMEC vzw
- Current Assignee: IMEC vzw
- Current Assignee Address: BE Leuven
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Priority: EP19214527 20191209
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/66 ; H01L29/06 ; H01L29/423

Abstract:
In one aspect, a method of forming a semiconducting device can comprise forming, on a substrate surface, a stack comprising semiconductor material sheets and a bottom semiconductor nanosheet; forming a trench through the stack vertically down through the bottom semiconductor nanosheet, thereby separating the stack into two substacks; selectively removing the bottom semiconductor nanosheet, thereby forming a bottom space extending under the substacks; and filling the bottom space and the trench with a dielectric material to provide a bottom isolation and formation of a dielectric wall between the substacks.
Public/Granted literature
- US20210175130A1 ISOLATED SEMICONDUCTOR LAYER STACKS FOR A SEMICONDUCTOR DEVICE Public/Granted day:2021-06-10
Information query
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