- Patent Title: Semiconductor device having a capping pattern on a gate electrode
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Application No.: US17024813Application Date: 2020-09-18
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Publication No.: US11557656B2Publication Date: 2023-01-17
- Inventor: Jonghan Lee , Wandon Kim , Jaeyeol Song , Jeonghyuk Yim , HyungSuk Jung
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Seoul
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Seoul
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2017-0161937 20171129
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L27/088 ; H01L29/51 ; H01L29/66 ; H01L21/28 ; H01L21/8234 ; H01L21/768

Abstract:
Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a gate electrode on a substrate, an upper capping pattern on the gate electrode, and a lower capping pattern between the gate electrode and the upper capping pattern. The lower capping pattern comprises a first portion between the gate electrode and the upper capping pattern, and a plurality of second portions extending from the first portion onto corresponding side surfaces of the upper capping pattern. The upper capping pattern covers a topmost surface of each of the second portions.
Public/Granted literature
- US20210005729A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2021-01-07
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