- 专利标题: Read-out circuit and read-out method for three-dimensional memory
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申请号: US15739723申请日: 2017-04-25
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公开(公告)号: US11568931B2公开(公告)日: 2023-01-31
- 发明人: Yu Lei , Houpeng Chen , Zhitang Song
- 申请人: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY
- 申请人地址: CN Shanghai
- 专利权人: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY
- 当前专利权人: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY
- 当前专利权人地址: CN Shanghai
- 代理机构: Global IP Services
- 代理商 Tianhua Gu
- 优先权: CN201710092925.7 20170221
- 国际申请: PCT/CN2017/081816 WO 20170425
- 国际公布: WO2018/152952 WO 20180830
- 主分类号: G11C11/00
- IPC分类号: G11C11/00 ; G11C13/00
摘要:
A read-out circuit and a read-out method for a three-dimensional memory, comprises a read reference circuit and a sensitive amplifier, the read reference circuit produces read reference current capable of quickly distinguishing reading low-resistance state unit current and reading high-resistance state unit current. The read reference circuit comprises a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. With respect to the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, the present invention introduces the matching of bit line parasite parameters, leakage current and transmission gate parasitic parameters into the read reference current, and introduces the matching of parasitic parameters of current mirror into the read current, thereby eliminating the phenomenon of pseudo reading and reducing the read-out time.
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