Invention Grant
- Patent Title: Fast sensing scheme with amplified sensing and clock modulation
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Application No.: US17343075Application Date: 2021-06-09
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Publication No.: US11568945B2Publication Date: 2023-01-31
- Inventor: Anirudh Amarnath , Jongyeon Kim
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: Morgan, Lewis & Bockius LLP
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/34 ; G11C16/10 ; G11C16/26 ; G11C16/32 ; G11C16/04 ; G11C11/56 ; H01L27/11582 ; H01L27/11519 ; H01L27/11565 ; H01L27/11556

Abstract:
A method of verifying the programming of a plurality of memory cells in a data storage system includes performing a setup operation including settling of bit lines associated with the subset of memory cells; performing a sensing operation including subjecting the settled bit lines to a verify voltage signal; and performing first and second latching operations identifying memory cells of the subset of memory cells having threshold voltages that meet first and second verify reference voltages, where the first and second latching operations are part of the same program verify operation with no setup time between them.
Public/Granted literature
- US20220399062A1 Fast Sensing Scheme With Amplified Sensing and Clock Modulation Public/Granted day:2022-12-15
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