Invention Grant
- Patent Title: Memory circuit architecture
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Application No.: US17136616Application Date: 2020-12-29
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Publication No.: US11600307B2Publication Date: 2023-03-07
- Inventor: David Li , Rahul Biradar , Biju Manakkam Veetil , Po-Hung Chen , Ayan Paul , Sung Son , Shivendra Kushwaha , Ravindra Reddy Chekkera , Derek Yang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: G11C5/02
- IPC: G11C5/02 ; G11C7/06 ; G11C7/10 ; G11C8/08 ; G11C8/10

Abstract:
A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.
Public/Granted literature
- US20220208232A1 MEMORY CIRCUIT ARCHITECTURE Public/Granted day:2022-06-30
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