Invention Grant
- Patent Title: SRAM circuits with aligned gate electrodes
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Application No.: US17345309Application Date: 2021-06-11
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Publication No.: US11605637B2Publication Date: 2023-03-14
- Inventor: Fang Chen , Jhon Jhy Liaw , Min-Chang Liang , Ren-Fen Tsui , Shih-Chi Fu , Yen-Huei Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/11
- IPC: H01L27/11 ; G11C11/418 ; H01L23/528 ; H01L27/02

Abstract:
A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driver includes second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes.
Public/Granted literature
- US20210305260A1 SRAM Circuits with Aligned Gate Electrodes Public/Granted day:2021-09-30
Information query
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