Exemplary semiconductor processing chambers may include a substrate support including a top surface. A peripheral edge region of the top surface may be recessed relative to a medial region of the top surface. The chambers may include a pumping liner disposed about an exterior surface of the substrate support. The chambers may include a liner disposed between the substrate support and the pumping liner. The liner may be spaced apart from the exterior surface to define a purge lumen between the liner and the substrate support. The chambers may include an edge ring seated on the peripheral edge region. The edge ring may extend beyond a peripheral edge of the substrate support and above a portion of the liner. A gap may be formed between a bottom surface of the edge ring and a top surface of the liner. The gap and the purge lumen may be fluidly coupled.