Invention Grant
- Patent Title: Asymmetric junctions of high voltage transistor in NAND flash memory
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Application No.: US17032239Application Date: 2020-09-25
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Publication No.: US11653496B2Publication Date: 2023-05-16
- Inventor: Chang Wan Ha , Chuan Lin , Deepak Thimmegowda , Zengtao Liu , Binh N. Ngo , Soo-yong Park
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law, PC
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L27/1158 ; H01L29/10 ; G11C16/04
Abstract:
The total silicon area used by a plurality of high voltage transistors in an array of NAND cells is reduced by modifying the silicon area layout such that the size of the source and drain of each of the plurality of high voltage transistors is dependent on the maximum voltage to be applied to each of the source and drain for the respective one of the plurality of high voltage transistors.
Public/Granted literature
- US20220102365A1 ASYMMETRIC JUNCTIONS OF HIGH VOLTAGE TRANSISTOR IN NAND FLASH MEMORY Public/Granted day:2022-03-31
Information query
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