Some embodiments relate to an integrated circuit including a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a plurality of dielectric layers and a plurality of metal layers that are stacked over one another in alternating fashion. The plurality of metal layers include a lower metal layer and an upper metal layer disposed over the lower metal layer. A bottom electrode is disposed over and in electrical contact with the lower metal layer. A dielectric layer is disposed over an upper surface of the bottom electrode. A top electrode is disposed over an upper surface of the dielectric layer and is in direct electrical contact with a lower surface of the upper metal layer.