Invention Grant
- Patent Title: Dynamic program-verify voltage adjustment for intra-block storage charge loss uniformity
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Application No.: US17123244Application Date: 2020-12-16
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Publication No.: US11687452B2Publication Date: 2023-06-27
- Inventor: Gary F. Besinga , Renato C. Padilla , Tawalin Opastrakoon , Sampath K. Ratnam , Michael G. Miller , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Ashutosh Malshe
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G06F12/06 ; G06F1/28 ; G11C16/34 ; G11C16/10
Abstract:
An amount of threshold voltage distribution shift is determined. The threshold voltage distribution shift corresponds to an amount of time after programming of a reference page of a block of a memory device. A program-verify voltage is adjusted based on the amount of threshold voltage distribution shift to obtain an adjusted program-verify voltage. Using the adjusted program-verify voltage, a temporally subsequent page of the block is programmed at a time corresponding to the amount of time after the programming of the reference page.
Public/Granted literature
- US20220188226A1 DYNAMIC PROGRAM-VERIFY VOLTAGE ADJUSTMENT FOR INTRA-BLOCK STORAGE CHARGE LOSS UNIFORMITY Public/Granted day:2022-06-16
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