A memory controller configured to control a non-volatile memory device includes: a signal generator configured to generate a plurality of control signals comprising a first signal and a second control signal; a core configured to provide a command for an operation of the non-volatile device; and a controller interface circuit configured to interface with the non-volatile memory device, wherein the controller interface circuit comprises a first transmitter connected to a first signal line and a second signal line; and a first receiver connected to the first signal line, and the first control signal and the second control signal are respectively transmitted to the non-volatile memory device through the first signal line and the second signal line.