公开(公告)号：US11704064B2

公开(公告)日：2023-07-18

申请号：US17321919

申请日：2021-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Choongeui Lee ,  Chulseung Lee

IPC: G11C7/22 ,  G06F3/06 ,  G06F13/16 ,  G11C7/10

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679 ,  G06F13/1689 ,  G11C7/1093 ,  G11C7/222

Abstract: A memory controller configured to control a non-volatile memory device includes: a signal generator configured to generate a plurality of control signals comprising a first signal and a second control signal; a core configured to provide a command for an operation of the non-volatile device; and a controller interface circuit configured to interface with the non-volatile memory device, wherein the controller interface circuit comprises a first transmitter connected to a first signal line and a second signal line; and a first receiver connected to the first signal line, and the first control signal and the second control signal are respectively transmitted to the non-volatile memory device through the first signal line and the second signal line.

公开(公告)号：US10366022B2

公开(公告)日：2019-07-30

申请号：US15871637

申请日：2018-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulseung Lee ,  Taesung Lee ,  Choongeui Lee ,  Soon Suk Hwang

IPC: G06F13/16 ,  G06K9/62 ,  G06F13/12 ,  G06N20/00

Abstract: A data training method of a storage device, which includes a storage controller and a nonvolatile memory device, includes transmitting a read training command to the nonvolatile memory device, receiving a first training pattern output from the nonvolatile memory device in response to the read training command, receiving a second training pattern output from the nonvolatile memory device in response to the read training command, comparing the received first training pattern and the received second training pattern with a reference pattern, and determining a read timing offset of the storage controller depending on the comparison result.

公开(公告)号：US11461172B2

公开(公告)日：2022-10-04

申请号：US17198315

申请日：2021-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulseung Lee ,  Soon Suk Hwang ,  Choongeui Lee

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

公开(公告)号：US20220011978A1

公开(公告)日：2022-01-13

申请号：US17321919

申请日：2021-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Choongeui Lee ,  Chulseung Lee

IPC: G06F3/06

Abstract: A memory controller configured to control a non-volatile memory device includes: a signal generator configured to generate a plurality of control signals comprising a first signal and a second control signal; a core configured to provide a command for an operation of the non-volatile device; and a controller interface circuit configured to interface with the non-volatile memory device, wherein the controller interface circuit comprises a first transmitter connected to a first signal line and a second signal line; and a first receiver connected to the first signal line, and the first control signal and the second control signal are respectively transmitted to the non-volatile memory device through the first signal line and the second signal line.

公开(公告)号：US11836041B2

公开(公告)日：2023-12-05

申请号：US17900336

申请日：2022-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulseung Lee ,  Soon Suk Hwang ,  Choongeui Lee

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G11C7/1084 ,  G11C7/22 ,  G11C29/52 ,  G11C2207/2254

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

公开(公告)号：US10970164B2

公开(公告)日：2021-04-06

申请号：US16248540

申请日：2019-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulseung Lee ,  Soon Suk Hwang ,  Choongeui Lee

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C7/10 ,  G11C7/22

Abstract: A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.