Multi-chip memory system having chip enable function
    4.
    发明授权
    Multi-chip memory system having chip enable function 有权
    具有芯片使能功能的多芯片存储系统

    公开(公告)号:US09589614B2

    公开(公告)日:2017-03-07

    申请号:US14919068

    申请日:2015-10-21

    Abstract: A storage device includes first and second nonvolatile memory groups that respectively include first and second nonvolatile memory chips, a memory controller connected to the first and second nonvolatile memory groups in common through input/output lines and at least one control line, and a group select circuit connected to the memory controller through the at least one control line and chip enable lines. The group select circuit is connected to the first and second nonvolatile memory groups through a plurality of first and second chip enable lines, respectively. The group select circuit, in response to receiving a control signal through the at least one control line, is configured to transmit chip enable signals to a selected memory group among the first nonvolatile memory group and the second nonvolatile memory group through selected chip enable lines among the first chip enable lines and the second chip enable lines.

    Abstract translation: 存储装置包括分别包括第一和第二非易失性存储器芯片的第一和第二非易失性存储器组,通过输入/输出线和至少一个控制线连接到第一和第二非易失性存储器组的存储器控​​制器,以及组选择 电路通过至少一个控制线和芯片使能线连接到存储器控制器。 组选择电路分别通过多个第一和第二芯片使能线连接到第一和第二非易失性存储器组。 组选择电路响应于通过至少一个控制线接收控制信号,被配置为通过所选择的芯片使能线在第一非易失性存储器组和第二非易失性存储器组之间向选定的存储器组发送芯片使能信号, 第一芯片使能线和第二芯片使能线。

    Memory controller, storage device and memory system

    公开(公告)号:US11704064B2

    公开(公告)日:2023-07-18

    申请号:US17321919

    申请日:2021-05-17

    Abstract: A memory controller configured to control a non-volatile memory device includes: a signal generator configured to generate a plurality of control signals comprising a first signal and a second control signal; a core configured to provide a command for an operation of the non-volatile device; and a controller interface circuit configured to interface with the non-volatile memory device, wherein the controller interface circuit comprises a first transmitter connected to a first signal line and a second signal line; and a first receiver connected to the first signal line, and the first control signal and the second control signal are respectively transmitted to the non-volatile memory device through the first signal line and the second signal line.

    Storage device and data training method thereof

    公开(公告)号:US10403375B2

    公开(公告)日:2019-09-03

    申请号:US15953992

    申请日:2018-04-16

    Abstract: A storage device includes a plurality of nonvolatile memory devices each exchanging data by using a data strobe signal and a data signal, and a storage controller categorizing the plurality of nonvolatile memory devices into a plurality of groups and performing training in units of the plurality of groups. The storage controller performs data training on a first nonvolatile memory device selected in a first group of the plurality of groups and sets a delay of a data signal of a second nonvolatile memory device included in the first group by using a result value of the data training for the first nonvolatile memory device.

    Data training method of storage device

    公开(公告)号:US10366022B2

    公开(公告)日:2019-07-30

    申请号:US15871637

    申请日:2018-01-15

    Abstract: A data training method of a storage device, which includes a storage controller and a nonvolatile memory device, includes transmitting a read training command to the nonvolatile memory device, receiving a first training pattern output from the nonvolatile memory device in response to the read training command, receiving a second training pattern output from the nonvolatile memory device in response to the read training command, comparing the received first training pattern and the received second training pattern with a reference pattern, and determining a read timing offset of the storage controller depending on the comparison result.

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