Invention Grant
- Patent Title: Integrated circuit including a capacitive element and corresponding manufacturing method
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Application No.: US17366585Application Date: 2021-07-02
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Publication No.: US11721773B2Publication Date: 2023-08-08
- Inventor: Christian Rivero , Brice Arrazat , Julien Delalleau , Joel Metz
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy
- Priority: FR 07076 2020.07.03
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/94 ; H01L21/28 ; H01L21/265 ; H01L49/02 ; H01L29/423 ; H01L29/788 ; H10B41/35

Abstract:
A semiconductor substrate includes excavations which form trenches sunk. A capacitive element includes: a first dielectric envelope conforming to sides and bottoms of the trenches; a first semiconductor layer conforming to a surface of the first dielectric envelope in the trenches; a second dielectric envelope conforming to a surface of the first semiconductor layer in the trenches; and a second semiconductor layer conforming to a surface of the second dielectric envelope in the trenches.
Public/Granted literature
- US20220005960A1 INTEGRATED CIRCUIT INCLUDING A CAPACITIVE ELEMENT AND CORRESPONDING MANUFACTURING METHOD Public/Granted day:2022-01-06
Information query
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