- 专利标题： Interconnect structure and method of forming same
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申请号： US17073533申请日： 2020-10-19
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公开(公告)号： US11728296B2公开(公告)日： 2023-08-15
- 发明人: Hsiao Yun Lo , Lin-Chih Huang , Tasi-Jung Wu , Hsin-Yu Chen , Yung-Chi Lin , Ku-Feng Yang , Tsang-Jiuh Wu , Wen-Chih Chiou
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 分案原申请号： US14158364 2014.01.17
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/48
摘要：
A device includes a first side interconnect structure over a first side of a substrate, wherein active circuits are in the substrate and adjacent to the first side of the substrate, a dielectric layer over a second side of the substrate, a pad embedded in the dielectric layer, the pad comprising an upper portion and a bottom portion formed of two different materials and a passivation layer over the dielectric layer.
公开/授权文献
- US20210050316A1 Interconnect Structure and Method of Forming Same 公开/授权日：2021-02-18
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