发明授权
- 专利标题: Dynamically configurable interconnect in a seamlessly integrated microcontroller chip
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申请号: US17315272申请日: 2021-05-08
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公开(公告)号: US11741033B2公开(公告)日: 2023-08-29
- 发明人: Scott David Kee
- 申请人: AyDeeKay LLC
- 申请人地址: US CA Aliso Viejo
- 专利权人: AyDeeKay LLC
- 当前专利权人: AyDeeKay LLC
- 当前专利权人地址: US CA Aliso Viejo
- 代理商 Steven Stupp
- 主分类号: G06F13/26
- IPC分类号: G06F13/26 ; G06F13/40 ; G06F3/06 ; G06F12/06 ; G06F12/0866 ; G06F13/16 ; G06F13/28 ; G06F13/364 ; G06F13/42 ; G06F13/14 ; G06F21/76
摘要:
Techniques in electronic systems, such as in systems comprising a CPU die and one or more external mixed-mode (analog) chips, may provide improvements advantages in one or more of system design, performance, cost, efficiency and programmability. In one embodiment, the CPU die comprises at least one microcontroller CPU and circuitry enabling the at least one CPU to have a full and transparent connectivity to an analog chip as if they are designed as a single chip microcontroller, while the interface design between the two is extremely efficient and with limited in number of wires, yet may provide improved performance without impact to functionality or the software model.
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