Invention Grant
- Patent Title: Block family combination and voltage bin selection
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Application No.: US17667326Application Date: 2022-02-08
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Publication No.: US11755478B2Publication Date: 2023-09-12
- Inventor: Michael Sheperek , Larry J. Koudele , Mustafa N. Kaynak , Shane Nowell
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/0802
- IPC: G06F12/0802 ; G06F12/06 ; G11C16/10

Abstract:
A set of two or more block families associated with a bin boundary of a first voltage bin is identified. A determination of at least a first voltage for a first block family of the plurality of block families and a second voltage for a second block family of the plurality of block families based on values of a data state metric for each of the plurality of block families. In response to a determination that a difference between the first voltage and the second voltage satisfies a block family combination criterion, the second block family is merged with the first block family.
Public/Granted literature
- US20220156188A1 BLOCK FAMILY COMBINATION AND VOLTAGE BIN SELECTION Public/Granted day:2022-05-19
Information query
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