Invention Grant
- Patent Title: Forming terminations in stacked memory arrays
-
Application No.: US17473679Application Date: 2021-09-13
-
Publication No.: US11756826B2Publication Date: 2023-09-12
- Inventor: Matthew J. King , Anilkumar Chandolu , Indra V. Chary , Darwin A. Clampitt , Gordon Haller , Thomas George , Brett D. Lowe , David A. Daycock
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- The original application number of the division: US16159955 2018.10.15
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/762 ; H10B43/40 ; H10B43/20 ; H10B43/35 ; H10B43/50

Abstract:
A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
Public/Granted literature
- US20210408029A1 FORMING TERMINATIONS IN STACKED MEMORY ARRAYS Public/Granted day:2021-12-30
Information query
IPC分类: