Invention Grant
- Patent Title: Dynamic read-level thresholds in memory systems
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Application No.: US17396386Application Date: 2021-08-06
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Publication No.: US11762589B2Publication Date: 2023-09-19
- Inventor: Zhongguang Xu , Tingjun Xie , Murong Lang , Zhenming Zhou
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C16/26
- IPC: G11C16/26 ; G06F3/06 ; G11C16/32 ; G01K13/00 ; G11C7/06 ; G11C7/22 ; G11C16/34 ; G11C16/04

Abstract:
A current operating characteristic value of a unit of the memory device is identified. An operating characteristic threshold value is identified from a set of operating characteristic thresholds, where the current operating characteristic value satisfies an operating characteristic threshold criterion that is based on the operating characteristic threshold value. A set of write-to-read (W2R) delay time thresholds that corresponds to the operating characteristic threshold value is identified from a plurality of sets of W2R delay time thresholds. Each of the W2R delay time thresholds in the set is associated with a corresponding read voltage level. A W2R delay time threshold associated with a W2R delay time threshold criterion is identified from the set of W2R delay time thresholds, where the W2R threshold criterion is satisfied by a current W2R delay time of the memory sub-system. A read voltage level associated with the identified W2R delay time threshold is identified.
Public/Granted literature
- US20230043877A1 DYNAMIC READ-LEVEL THRESHOLDS IN MEMORY SYSTEMS Public/Granted day:2023-02-09
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