发明授权
- 专利标题: Apparatus and method for memory management in a graphics processing environment
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申请号: US17827556申请日: 2022-05-27
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公开(公告)号: US11768781B2公开(公告)日: 2023-09-26
- 发明人: Niranjan L. Cooray , Abhishek R. Appu , Altug Koker , Joydeep Ray , Balaji Vembu , Pattabhiraman K , David Puffer , David J. Cowperthwaite , Rajesh M. Sankaran , Satyeshwar Singh , Sameer Kp , Ankur N. Shah , Kun Tian
- 申请人: Niranjan L. Cooray , Abhishek R. Appu , Altug Koker , Joydeep Ray , Balaji Vembu , Pattabhiraman K , David Puffer , David J. Cowperthwaite , Rajesh M. Sankaran , Satyeshwar Singh , Sameer Kp , Ankur N. Shah , Kun Tian
- 申请人地址: US CA Folsom
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Nicholson De Vos Webster & Elliott LLP
- 主分类号: G06F9/455
- IPC分类号: G06F9/455 ; G06F9/50 ; G06F13/16 ; G06F12/1009 ; G06F12/1027 ; G06F12/1036 ; G06F12/0802 ; G06F13/40
摘要:
An apparatus and method are described for implementing memory management in a graphics processing system. For example, one embodiment of an apparatus comprises: a first plurality of graphics processing resources to execute graphics commands and process graphics data; a first memory management unit (MMU) to communicatively couple the first plurality of graphics processing resources to a system-level MMU to access a system memory; a second plurality of graphics processing resources to execute graphics commands and process graphics data; a second MMU to communicatively couple the second plurality of graphics processing resources to the first MMU; wherein the first MMU is configured as a master MMU having a direct connection to the system-level MMU and the second MMU comprises a slave MMU configured to send memory transactions to the first MMU, the first MMU either servicing a memory transaction or sending the memory transaction to the system-level MMU on behalf of the second MMU.
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