Invention Grant
- Patent Title: Circuitry and methods for fractional division of high-frequency clock signals
-
Application No.: US17512231Application Date: 2021-10-27
-
Publication No.: US11784651B2Publication Date: 2023-10-10
- Inventor: Ravichandar Reddy Geetla , Deependra Kumar Jain , Gaurav Agrawal , Ravi Kumar
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H03L7/099
- IPC: H03L7/099 ; H03L7/081 ; H03L7/197 ; H03M3/00

Abstract:
An oscillator provides a plurality of clock signals, including a first clock signal having a first frequency and a first period, wherein each clock signal has the first frequency and is phase shifted from the first clock signal by an integer times a predetermined fractional amount of the first period. A multiphase frequency divider receives the plurality of clock signals and provides a divided clock output, and includes an integer frequency divider which provides the divided clock output based on a modified clock input and a clock selector which provides a current clock as the modified clock input during a first portion of the divided clock output and a next clock as the modified clock input during a subsequent portion of the divided clock output. The next clock is selected from the plurality of clock signals based on a selected fractional phase shift amount indicated by a sigma-delta modulator.
Public/Granted literature
- US20230126891A1 CIRCUITRY AND METHODS FOR FRACTIONAL DIVISION OF HIGH-FREQUENCY CLOCK SIGNALS Public/Granted day:2023-04-27
Information query