Invention Grant
- Patent Title: Laminated varistor
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Application No.: US17632827Application Date: 2020-07-16
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Publication No.: US11791072B2Publication Date: 2023-10-17
- Inventor: Michiya Watanabe , Naoki Mutou , Ken Yanai
- Applicant: Panasonic Intellectual Property Management Co., Ltd.
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP 19235386 2019.12.26
- International Application: PCT/JP2020/027610 2020.07.16
- International Announcement: WO2021/131115A 2021.07.01
- Date entered country: 2022-02-04
- Main IPC: H01C7/18
- IPC: H01C7/18 ; H01C7/102 ; H01C7/112

Abstract:
A laminated varistor includes a varistor layer, a first internal electrode provided on an upper surface of the varistor layer, a second internal electrode provided on a lower surface of the varistor layer and facing the first internal electrode across the varistor layer in upward and downward directions, a first external electrode provided on a first side surface of the varistor layer and electrically connected to the first internal electrode, and a second external electrode provided on a second side surface of the varistor layer and electrically connected to the second internal electrode. The first internal electrode is extended from the first external electrode in a first extension direction. The first internal electrode includes first electrode strips arranged in a first arrangement direction perpendicular to the first extension direction and spaced apart from one another. This laminated varistor has improved surge-resistant characteristics.
Public/Granted literature
- US20220270791A1 LAMINATED VARISTOR Public/Granted day:2022-08-25
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