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公开(公告)号:US11387023B2
公开(公告)日:2022-07-12
申请号:US16622572
申请日:2018-09-19
Inventor: Ken Yanai , Tomokazu Yamaguchi , Yuji Yamagishi , Naoki Mutou , Sayaka Matsumoto , Ryosuke Usui
Abstract: A sintered body that includes ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.
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公开(公告)号:US11908599B2
公开(公告)日:2024-02-20
申请号:US17892711
申请日:2022-08-22
Inventor: Keiji Kawajiri , Naoki Mutou , Hironori Motomitsu , Michiya Watanabe , Yuji Yamagishi
IPC: H01C7/102 , H01C7/112 , H01C17/065 , H01C1/142 , H01C7/10
CPC classification number: H01C7/102 , H01C1/142 , H01C7/1006 , H01C7/112 , H01C17/06546
Abstract: A varistor includes a sintered body, an internal electrode, an insulating layer, and an external electrode. The internal electrode is disposed in an interior of the sintered body. The insulating layer covers at least part of the sintered body and includes Zn2SiO4. The external electrode is electrically connected to the internal electrode, covers part of the sintered body and part of the insulating layer, and is in contact with the part of the insulating layer. The insulating layer has a region being in contact with the external electrode, the region having a greater average thickness than a region of the insulating layer which is out of contact with the external electrode.
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公开(公告)号:US11791072B2
公开(公告)日:2023-10-17
申请号:US17632827
申请日:2020-07-16
Inventor: Michiya Watanabe , Naoki Mutou , Ken Yanai
Abstract: A laminated varistor includes a varistor layer, a first internal electrode provided on an upper surface of the varistor layer, a second internal electrode provided on a lower surface of the varistor layer and facing the first internal electrode across the varistor layer in upward and downward directions, a first external electrode provided on a first side surface of the varistor layer and electrically connected to the first internal electrode, and a second external electrode provided on a second side surface of the varistor layer and electrically connected to the second internal electrode. The first internal electrode is extended from the first external electrode in a first extension direction. The first internal electrode includes first electrode strips arranged in a first arrangement direction perpendicular to the first extension direction and spaced apart from one another. This laminated varistor has improved surge-resistant characteristics.
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