公开(公告)号：US20220270791A1

公开(公告)日：2022-08-25

申请号：US17632827

申请日：2020-07-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MICHIYA WATANABE ,  NAOKI MUTOU ,  KEN YANAI

IPC: H01C7/18 ,  H01C7/112 ,  H01C7/102

Abstract: A laminated varistor includes a varistor layer, a first internal electrode provided on an upper surface of the varistor layer, a second internal electrode provided on a lower surface of the varistor layer and facing the first internal electrode across the varistor layer in upward and downward directions, a first external electrode provided on a first side surface of the varistor layer and electrically connected to the first internal electrode, and a second external electrode provided on a second side surface of the varistor layer and electrically connected to the second internal electrode. The first internal electrode is extended from the first external electrode in a first extension direction. The first internal electrode includes first electrode strips arranged in a first arrangement direction perpendicular to the first extension direction and spaced apart from one another. This laminated varistor has improved surge-resistant characteristics.

公开(公告)号：US20220246334A1

公开(公告)日：2022-08-04

申请号：US17582631

申请日：2022-01-24

Applicant: KYOCERA AVX Components Corporation

Inventor： Palaniappan Ravindranathan ,  Marianne Berolini ,  Michael W. Kirk

IPC: H01C7/112 ,  H01C1/148 ,  H01C17/28

Abstract: A varistor can include a monolithic body including a plurality of dielectric layers stacked in a Z-direction that is perpendicular to a longitudinal direction. The monolithic body can have a first end and a second end that is spaced apart from the first end in the longitudinal direction. A first external terminal can be disposed along the first end. A second external terminal can be disposed along the second end. A first plurality of electrodes can be connected with the first external terminal and can extend from the first end towards the second end of the monolithic body. A second plurality of electrodes can be connected with the second external terminal and can extend from the second end towards the first end of the monolithic body. At least one of the first external terminal or the second external terminal can include a conductive polymeric composition.

公开(公告)号：US20220165460A1

公开(公告)日：2022-05-26

申请号：US17533920

申请日：2021-11-23

Applicant: TDK CORPORATION

Inventor： Shin KAGAYA ,  Masayuki UCHIDA ,  Naoyoshi YOSHIDA ,  Takeshi YANATA ,  Satoshi GOTO ,  Takeshi OYANAGI ,  Yusuke IMAI ,  Daiki SUZUKI ,  Kaname UEDA

IPC: H01C7/18 ,  H01C7/10 ,  H01C7/112

Abstract: A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.

公开(公告)号：US20210358663A1

公开(公告)日：2021-11-18

申请号：US17286909

申请日：2019-12-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YOSHIKO HIGASHI ,  EIICHI KOGA

IPC: H01C7/112 ,  H01C7/102 ,  H01C17/28

Abstract: A varistor includes an effective layer having first and second surfaces opposite to each other, a first ineffective layer stacked on the first surface of the effective layer, a second ineffective layer stacked on the second surface of the effective layer, and an external electrode. The effective layer includes a ceramic layer having a polycrystalline structure including crystal particles exhibiting voltage nonlinear characteristics, and internal electrodes stacked alternately on the ceramic layer. The thickness of the second ineffective layer is equal to or more than 1.1 times a thickness of the first ineffective layer and equal to or smaller than 6 times the thickness of the first ineffective layer. This varistor has a small size and excellent surge resistance.

公开(公告)号：US20210327617A1

公开(公告)日：2021-10-21

申请号：US17359721

申请日：2021-06-28

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MIKINORI AMISAWA ,  MASUTO OMIYA ,  KOUJI HIRATE ,  YUKIHITO YAMASHITA ,  TOUICHI MAKITA

IPC: H01C7/112 ,  H01C1/14

Abstract: An object is to provide a laminated varistor excellent in clamping voltage ratio. Laminated varistor includes at least a pair of internal electrodes provided in varistor layer containing ZnO as a main component.
Internal electrode contains Ag as a main component and is made of a metal containing at least one type selected from Pt and Au. The total weight of Pt and Au with respect to the weight of the metal constituting internal electrode is set between 2% and 30% (inclusive). With such a configuration, diffusion of Ag into varistor layer can be prevented, and a laminated varistor excellent in clamping voltage ratio can be obtained.

公开(公告)号：US20210238052A1

公开(公告)日：2021-08-05

申请号：US15734863

申请日：2019-06-04

Applicant: KOA CORPORATION ,  JFE MINERAL COMPANY, LTD.

Inventor： Naomi ISHIDA ,  Yoji GOMI ,  Kenichi IGUCHI ,  Etsurou UDAGAWA ,  Yuko ECHIZENYA ,  Yoshimi NAKATA

IPC: C01G9/00 ,  H01C7/112

Abstract: Focusing on zinc oxide itself, which is a main raw material for a zinc oxide varistor (laminated varistor), a predetermined amount of additive is added to a zinc oxide powder having crystallite size of 20 to 100 nm, particle diameter of 20 to 110 nm found using a specific area BET method, untamped density of 0.60 g/cm3 or greater, and tap density of 0.80 g/cm3 or greater. This allows a zinc oxide sintered body to secure uniformity, high density, and high electric conductivity, resulting in a zinc oxide varistor with high surge resistance, capable of downsizing and cost reduction. Moreover, addition of aluminum (Al), as a donor element, to the zinc oxide powder allows control of sintered grain size in conformity with the aluminum added amount and baking temperature, and also allows adjustment of varistor voltage, etc.

公开(公告)号：US11031159B2

公开(公告)日：2021-06-08

申请号：US16085940

申请日：2017-03-14

Applicant: TDK Electronics AG

Inventor： Yongli Wang ,  Jianxin Wu ,  Wenbin Yi

IPC: H01C7/00 ,  H01B1/08 ,  C04B35/453 ,  H01C7/112 ,  C04B35/626 ,  C04B41/00 ,  C04B41/51 ,  C01G9/02 ,  C04B41/88 ,  C01B13/36 ,  C04B35/01 ,  C04B111/00

Abstract: A ceramic material, a varistor and methods for forming a ceramic material and a varistor are disclosed. In an embodiment, a ceramic material includes ZnO as a main component and additives selected from the group consisting of an Al3+-containing solution, a Ba2+-containing solution, and at least one compound containing a metal element, wherein the metal element is selected from the group consisting of Bi, Sb, Co, Mn, Ni, Y, and Cr.

公开(公告)号：US10667400B2

公开(公告)日：2020-05-26

申请号：US15508224

申请日：2015-08-31

Applicant: EPCOS AG

Inventor： Thomas Feichtinger

IPC: H05K1/14 ,  H05K3/12 ,  H05K1/18 ,  H05K3/32 ,  H01G4/224 ,  H01G4/232 ,  H01C1/028 ,  H01C7/02 ,  H01C7/10 ,  H01C1/148 ,  H01C7/18 ,  H01C7/04 ,  H01G4/30 ,  H01C1/14 ,  H01C7/00 ,  H01C17/00 ,  H01G4/005 ,  H01G4/12 ,  H01G4/248 ,  H05K1/09 ,  H05K1/11 ,  H01C7/112 ,  H05K1/03

Abstract: An electrical component for embedding into a carrier comprises a ceramic main body, an electrically insulating passivation layer which is applied to the main body, and at least one inner electrode. In addition, the electrical component comprises an outer electrode which is connected to the inner electrode, wherein the outer electrode comprises a first electrode layer comprising a metal and a second electrode layer which is arranged on the latter and comprises copper.

公开(公告)号：US10233123B2

公开(公告)日：2019-03-19

申请号：US15368729

申请日：2016-12-05

Applicant: THINKING ELECTRONIC INDUSTRIAL CO., LTD.

Inventor： Yong-Ming Lin ,  Yan-Liang Shih ,  Tui-Ting Tu

IPC: C03C3/15 ,  C04B35/63 ,  C04B35/453 ,  C04B35/622 ,  C04B35/626 ,  C04B35/634 ,  C04B35/638 ,  C04B35/64 ,  H01C1/148 ,  H01C7/112

Abstract: A varistor composition free of Sb comprising: (a) ZnO; (b) B—Bi—Zn—Pr glass, or B—Bi—Zn—La glass, or a mixture thereof; (c) a cobalt compound, a chromium compound, a nickel compound, a manganese compound, or mixtures thereof; (d) SnO2; and (e) an aluminum compound, a silver compound, or a mixture thereof. By adjusting the ratio between the components, the varistor composition may be made into a multilayer varistor with inner electrodes having a low concentration of noble metals at a sintering temperature less than 1200° C. The multilayer varistor made from the varistor composition has good maximum surge current, good ESD withstand ability, and low fabrication cost.

公开(公告)号：US10170224B2

公开(公告)日：2019-01-01

申请号：US15821433

申请日：2017-11-22

Applicant: International Business Machines Corporation

Inventor： Jeffrey P. Gambino ,  Richard S. Graf ,  Sudeep Mandal

IPC: H01C7/108 ,  H01L21/02 ,  H01C17/28 ,  H01C17/245 ,  H01C17/065 ,  H01C7/10 ,  H01C7/112 ,  H01L49/02 ,  H01L29/06 ,  H01C17/12 ,  H01L21/762 ,  H01L23/528 ,  H01L23/522 ,  H01L27/02 ,  H01C17/00 ,  H01C7/00 ,  H01L23/62 ,  H01L23/64 ,  H01C7/12

Abstract: A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may include a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.