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    Laminated varistor
    2.
    发明授权
    Laminated varistor 有权

    公开(公告)号：US11791072B2

    公开(公告)日：2023-10-17

    申请号：US17632827

    申请日：2020-07-16

    Applicant: Panasonic Intellectual Property Management Co., Ltd.

    Inventor： Michiya Watanabe ,  Naoki Mutou ,  Ken Yanai

    IPC: H01C7/18 ,  H01C7/102 ,  H01C7/112

    CPC classification number: H01C7/18 ,  H01C7/102 ,  H01C7/112

    Abstract: A laminated varistor includes a varistor layer, a first internal electrode provided on an upper surface of the varistor layer, a second internal electrode provided on a lower surface of the varistor layer and facing the first internal electrode across the varistor layer in upward and downward directions, a first external electrode provided on a first side surface of the varistor layer and electrically connected to the first internal electrode, and a second external electrode provided on a second side surface of the varistor layer and electrically connected to the second internal electrode. The first internal electrode is extended from the first external electrode in a first extension direction. The first internal electrode includes first electrode strips arranged in a first arrangement direction perpendicular to the first extension direction and spaced apart from one another. This laminated varistor has improved surge-resistant characteristics.

    Metal oxide varistor formulation
    3.
    发明授权
    Metal oxide varistor formulation 有权

    公开(公告)号：US11315709B2

    公开(公告)日：2022-04-26

    申请号：US17123943

    申请日：2020-12-16

    Applicant: Hubbell Incorporated

    Inventor： Stephen Franklin Poterala

    IPC: H01C7/102 ,  H01C7/108

    Abstract: Provided are metal oxide varistors comprising a sintered ceramic, in which the ceramic comprises, by weight, about 91.0% to about 97.0% ZnO, at least 0.3% Mn, at least 0.4% Bi, at least 1.0% Sb, and 0.50% or less Co. The metal oxide varistors as disclosed herein may exhibit reduced power dissipation, improved thermal stability, and may be produced at a lower cost relative to conventional MOV devices.

    Method for producing chip varistor and chip varistor
    4.
    发明授权
    Method for producing chip varistor and chip varistor 有权

    公开(公告)号：US11302464B2

    公开(公告)日：2022-04-12

    申请号：US17230100

    申请日：2021-04-14

    Applicant: TDK CORPORATION

    Inventor： Satoshi Goto ,  Naoyoshi Yoshida ,  Takeshi Yanata ,  Takeshi Oyanagi ,  Daiki Suzuki ,  Shin Kagaya ,  Masayuki Uchida ,  Yusuke Imai

    IPC: H01C7/10 ,  H01C7/102 ,  H01C7/108

    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

    Varistor for high temperature applications
    5.
    发明授权
    Varistor for high temperature applications 有权

    公开(公告)号：US10998114B2

    公开(公告)日：2021-05-04

    申请号：US17003206

    申请日：2020-08-26

    Applicant: AVX Corporation

    Inventor： Palaniappan Ravindranathan ,  Marianne Berolini

    IPC: H01C7/112 ,  H01C7/102

    Abstract: The present invention is directed to a varistor comprising a dielectric material comprising a sintered ceramic composed of zinc oxide grains and a grain boundary layer between the zinc oxide grains. The grain boundary layer contains a positive temperature coefficient thermistor material in an amount of less than 10 mol % based on the grain boundary layer.

    Overvoltage protection device
    6.
    发明授权
    Overvoltage protection device 有权

    公开(公告)号：US10714241B2

    公开(公告)日：2020-07-14

    申请号：US16728564

    申请日：2019-12-27

    Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

    Inventor： Teddy C. T. To ,  ChuanFang Chin ,  Yaosheng Du

    IPC: H02H9/00 ,  H01C7/102 ,  H01C7/12 ,  H02H9/04 ,  H01L29/87

    Abstract: In one embodiment, an overvoltage protection device may include a metal oxide varistor (MOV) having a first surface and a second surface; a semiconductor substrate having a first outer surface and a second outer surface and comprising a semiconductor crowbar device comprising a plurality of semiconductor layers arranged in electrical series to one another, the semiconductor substrate being disposed on a first side of the metal oxide varistor; a conductive region disposed between the second surface of the MOV and the first outer surface of the semiconductor substrate; a first electrical contact disposed on the first surface of the MOV; and a second electrical contact disposed on the second outer surface of the semiconductor substrate.

    Varistor for High Temperature Applications
    7.
    发明申请
    Varistor for High Temperature Applications 审中-公开

    公开(公告)号：US20190318853A1

    公开(公告)日：2019-10-17

    申请号：US16386564

    申请日：2019-04-17

    Applicant: AVX Corporation

    Inventor： Palaniappan Ravindranathan ,  Marianne Berolini

    IPC: H01C7/112 ,  H01C7/102

    Abstract: The present invention is directed to a varistor comprising a dielectric material comprising a sintered ceramic composed of zinc oxide grains and a grain boundary layer between the zinc oxide grains. The grain boundary layer contains a positive temperature coefficient thermistor material in an amount of less than 10 mol % based on the grain boundary layer.

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