Invention Grant
- Patent Title: Split-gate flash memory cell with improved control gate capacitive coupling, and method of making same
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Application No.: US17346524Application Date: 2021-06-14
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Publication No.: US11799005B2Publication Date: 2023-10-24
- Inventor: Leo Xing , Chunming Wang , Xian Liu , Nhan Do , Guo Xiang Song
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Priority: CN 2110266241.0 2021.03.11
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/788 ; H01L29/66 ; H01L21/28

Abstract:
A method of forming a memory device that includes forming a first insulation layer, a first conductive layer, and a second insulation layer on a semiconductor substrate, forming a trench in the second insulation layer to expose the upper surface of the first conductive layer, performing an oxidation process and a sloped etch process to reshape the upper surface to a concave shape, forming a third insulation layer on the reshaped upper surface, forming a conductive spacer on the third insulation layer, removing portions of the first conductive layer leaving a floating gate under the conductive spacer with the reshaped upper surface terminating at a side surface at a sharp edge, and forming a word line gate laterally adjacent to and insulated from the floating gate. The conductive spacer includes a lower surface that faces and matches the shape of the reshaped upper surface.
Public/Granted literature
- US20220293756A1 SPLIT-GATE FLASH MEMORY CELL WITH IMPROVED CONTROL GATE CAPACITIVE COUPLING, AND METHOD OF MAKING SAME Public/Granted day:2022-09-15
Information query
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