Invention Grant
- Patent Title: Distributed dynamic architecture for error correction
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Application No.: US17679003Application Date: 2022-02-23
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Publication No.: US11811903B2Publication Date: 2023-11-07
- Inventor: Rita H. Wouhaybi , Robert Chavez , Mark Yarvis , John Vicente , Kirk Smith
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H04L69/40
- IPC: H04L69/40 ; H04L67/10 ; G05B19/042 ; G05B19/05 ; G05B19/418 ; H04L41/082 ; H04L41/084 ; H04L67/04 ; H04L67/104 ; H04L67/12 ; H04L67/125 ; H04L67/00 ; G06F8/65 ; G06F11/20 ; H04L67/565 ; H04L41/0668

Abstract:
Various systems and methods may be used to implement a software defined industrial system. For example, an orchestrated system of distributed nodes may run an application, including modules implemented on the distributed nodes. The orchestrated system may include an orchestration server, a first node executing a first module, and a second node executing a second module. In response to the second node failing, the second module may be redeployed to a replacement node (e.g., the first node or a different node). The replacement mode may be determined by the first node or another node, for example based on connections to or from the second node.
Public/Granted literature
- US20220329676A1 DISTRIBUTED DYNAMIC ARCHITECTURE FOR ERROR CORRECTION Public/Granted day:2022-10-13
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