Invention Grant
- Patent Title: Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate
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Application No.: US17466842Application Date: 2021-09-03
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Publication No.: US11842981B2Publication Date: 2023-12-12
- Inventor: Rahul Jain , Ji Yong Park , Kyu Oh Lee
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/00 ; H01L23/538 ; H01L25/065

Abstract:
Examples relate to a die interconnect substrate comprising a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate further comprises a substrate structure comprising a substrate interconnect electrically insulated from the bridge die, wherein the bridge die is embedded in the substrate structure. The die interconnect substrate further comprises a first interface structure for attaching a semiconductor die to the substrate structure, wherein the first interface structure is connected to the first bridge die pad. The die interconnect substrate further comprises a second interface structure for attaching a semiconductor die to the substrate structure, wherein the second interface structure is connected to the substrate interconnect. A surface of the first interface structure and a surface of the second interface structure are at the same height.
Public/Granted literature
Information query
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