Invention Grant
- Patent Title: Three-dimensional memory device including low-k drain-select-level isolation structures and methods of forming the same
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Application No.: US17317578Application Date: 2021-05-11
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Publication No.: US11856765B2Publication Date: 2023-12-26
- Inventor: Koichi Matsuno , Masaaki Higashitani , Johann Alsmeier
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: THE MARBURY LAW GROUP PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H10B41/27 ; H10B41/10 ; H10B41/35 ; H10B43/10 ; H10B43/27 ; H10B43/35

Abstract:
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, an array of memory opening fill structures located within an array of memory openings vertically extending through the alternating stack, and a drain-select-level isolation structure vertically extending through drain-select-level electrically conductive layers between two rows of memory opening fill structures. The drain-select-level isolation structure may comprise a low-k dielectric material or an air gap.
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