Invention Grant
- Patent Title: Package with a substrate comprising an embedded capacitor with side wall coupling
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Application No.: US17358838Application Date: 2021-06-25
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Publication No.: US11876085B2Publication Date: 2024-01-16
- Inventor: Abinash Roy , Lohith Kumar Vemula , Bharani Chava , Jonghae Kim
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Main IPC: H01L25/16
- IPC: H01L25/16 ; H01L21/48 ; H01L23/13 ; H01L23/498 ; H01L23/64 ; H01G4/232

Abstract:
A package comprising a substrate and an integrated device coupled to the substrate. The substrate includes at least one dielectric layer, a plurality of interconnects comprising a first interconnect and a second interconnect, a capacitor located at least partially in the substrate, the capacitor comprising a first terminal and a second terminal, a first solder interconnect coupled to a first side surface of the first terminal and the first interconnect, and a second solder interconnect coupled to a second side surface of the second terminal and the second interconnect.
Public/Granted literature
- US20220415868A1 PACKAGE WITH A SUBSTRATE COMPRISING AN EMBEDDED CAPACITOR WITH SIDE WALL COUPLING Public/Granted day:2022-12-29
Information query
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