Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US17697380Application Date: 2022-03-17
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Publication No.: US11882697B2Publication Date: 2024-01-23
- Inventor: Shu Shimizu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Rimon, P.C.
- Priority: JP 21077655 2021.04.30
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/06 ; H01L21/70 ; H10B41/42 ; H01L29/66

Abstract:
A non-volatile semiconductor memory and three or more types of transistors are provided. A thickness of a first gate oxide film of a first transistor is larger than that of a second gate oxide film of a second transistor, and is smaller than that of a third gate oxide film of a third transistor. In a first transistor region, a first silicon oxide film is formed on a surface of a semiconductor substrate, and second and third silicon oxide films are formed on the first silicon oxide film. By removing the second and third silicon oxide films and a part of an upper layer of the first silicon oxide film, the first gate oxide film is formed from the first silicon oxide film.
Public/Granted literature
- US20220352189A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2022-11-03
Information query
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