Invention Grant
- Patent Title: Semiconductor packages and method of manufacture
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Application No.: US17869286Application Date: 2022-07-20
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Publication No.: US11894312B2Publication Date: 2024-02-06
- Inventor: Wei-Yu Chen , Chun-Chih Chuang , Kuan-Lin Ho , Yu-Min Liang , Jiun Yi Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16883186 2020.05.26
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L21/683 ; H01L23/31 ; H01L23/00

Abstract:
A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.
Public/Granted literature
- US20220359406A1 Semiconductor Packages and Method of Manufacture Public/Granted day:2022-11-10
Information query
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