- 专利标题: Method for reading data of a first memory cell transistor of a nonvolatile semiconductor memory device
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申请号: US17744571申请日: 2022-05-13
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公开(公告)号: US11903205B2公开(公告)日: 2024-02-13
- 发明人: Masaru Kito , Hideaki Aochi , Ryota Katsumata , Akihiro Nitayama , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Yasuyuki Matsuoka , Mitsuru Sato
- 申请人: Kioxia Corporation
- 申请人地址: JP Tokyo
- 专利权人: Kioxia Corporation
- 当前专利权人: Kioxia Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- 优先权: JP 06086674 2006.03.27
- 分案原申请号: US11654551 2007.01.18
- 主分类号: H10B43/27
- IPC分类号: H10B43/27 ; H01L21/822 ; H01L27/06 ; H01L27/105 ; H10B41/27 ; H10B43/20 ; H10B43/40 ; H10B69/00 ; G11C16/04
摘要:
A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
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