Invention Grant
- Patent Title: Etch profile control of polysilicon structures of semiconductor devices
-
Application No.: US17234138Application Date: 2021-04-19
-
Publication No.: US12014960B2Publication Date: 2024-06-18
- Inventor: Kuo-Cheng Chiang , Chih-Hao Wang , Kuan-Ting Pan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/8238 ; H01L27/088 ; H01L27/092 ; H01L29/08 ; H01L29/423 ; H01L29/51 ; H01L29/66 ; H01L29/78

Abstract:
A method of forming first and second fin field effect transistors (finFETs) on a substrate includes forming first and second fin structures of the first and second finFETs, respectively, on the substrate and forming first and second oxide regions having first and second thicknesses on top surfaces of the first and second fin structures, respectively. The method further includes forming third and fourth oxide regions having third and fourth thicknesses on sidewalls on the first and second fin structures, respectively. The first and second thicknesses are greater than the third and fourth thicknesses, respectively. The method further includes forming a first polysilicon structure on the first and third oxide regions and forming a second polysilicon structure on the second and fourth oxide regions. The method also includes forming first and second source/drain regions on first and second recessed portions of the first and second fin structures, respectively and replacing the first and second polysilicon structures with first and second gate structures, respectively.
Public/Granted literature
- US20210257259A1 ETCH PROFILE CONTROL OF POLYSILICON STRUCTURES OF SEMICONDUCTOR DEVICES Public/Granted day:2021-08-19
Information query
IPC分类: