Invention Grant
- Patent Title: Three-dimensional NOR array including vertical word lines and discrete memory elements and methods of manufacture
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Application No.: US17237447Application Date: 2021-04-22
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Publication No.: US12035535B2Publication Date: 2024-07-09
- Inventor: Adarsh Rajashekhar , Raghuveer S. Makala , Rahul Sharangpani
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: THE MARBURY LAW GROUP PLLC
- Main IPC: H10B51/20
- IPC: H10B51/20 ; H01L29/76 ; H10B41/27 ; H10B43/27 ; H01L29/16 ; H01L29/161 ; H01L29/20 ; H01L29/24

Abstract:
A three-dimensional memory device includes an alternating stack of source layers and drain layers located over a substrate, a memory opening vertically extending through the alternating stack, a vertical word line located in the memory opening and vertically extending through each of the source layers and the drain layers of the alternating stack, discrete semiconductor channels contacting horizontal surfaces of a respective vertically neighboring pair of a source layer of the source layers and a drain layer of the drain layers, and a vertical stack of discrete memory material portions laterally surrounding the vertical word line.
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