Invention Grant
- Patent Title: Multi-layer polysilicon stack for semiconductor devices
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Application No.: US17512484Application Date: 2021-10-27
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Publication No.: US12080755B2Publication Date: 2024-09-03
- Inventor: Furen Lin , Yunlong Liu , Zhi Peng Feng , Rui Liu , Rui Song , Manoj K Jain
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Yudong Kim; Frank D. Cimino
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L23/495 ; H01L27/08 ; H01L29/66 ; H01L49/02

Abstract:
In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.
Public/Granted literature
- US20220416014A1 MULTI-LAYER POLYSILICON STACK FOR SEMICONDUCTOR DEVICES Public/Granted day:2022-12-29
Information query
IPC分类: